Add MAX32657

boards/adi/max32657evkit/Kconfig.defconfig

@@ -0,0 +1,25 @@
+# Copyright (c) 2024-2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_MAX32657EVKIT
+
+# Code Partition:
+#
+# For the secure version of the board the firmware is linked at the beginning
+# of the flash, or into the code-partition defined in DT if it is intended to
+# be loaded by MCUboot. If the secure firmware is to be combined with a non-
+# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
+# be restricted to the size of its code partition.
+#
+# For the non-secure version of the board, the firmware
+# must be linked into the code-partition (non-secure) defined in DT, regardless.
+# Apply this configuration below by setting the Kconfig symbols used by
+# the linker according to the information extracted from DT partitions.
+
+# Workaround for not being able to have commas in macro arguments
+DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+endif # BOARD_MAX32657EVKIT

boards/adi/max32657evkit/Kconfig.max32657evkit

@@ -0,0 +1,5 @@
+# Copyright (c) 2024-2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_MAX32657EVKIT
+	select SOC_MAX32657 if BOARD_MAX32657EVKIT_MAX32657

boards/adi/max32657evkit/board.cmake

@@ -0,0 +1,8 @@
+# Copyright (c) 2024-2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=MAX32657" "--reset-after-load")
+
+include(${ZEPHYR_BASE}/boards/common/openocd-adi-max32.boards.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/adi/max32657evkit/board.yml

@@ -0,0 +1,8 @@
+# Copyright (c) 2024-2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board:
+  name: max32657evkit
+  vendor: adi
+  socs:
+  - name: max32657

boards/adi/max32657evkit/max32657evkit_max32657.dts

@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2024-2025 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <adi/max32/max32657.dtsi>
+#include "max32657evkit_max32657_common.dtsi"
+
+/ {
+	 chosen {
+		 zephyr,sram = &secure_ram;
+		 zephyr,flash = &flash0;
+		 zephyr,code-partition = &slot0_partition;
+	 };
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		secure_ram: partition@30000000 {
+			label = "secure-memory";
+			reg = <0x30000000 DT_SIZE_K(256)>;
+		};
+	};
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		slot0_partition: partition@0 {
+			label = "image-0";
+			reg = <0x0 DT_SIZE_K(960)>;
+			read-only;
+		};
+
+		storage_partition: partition@f0000 {
+			label = "storage";
+			reg = <0xf0000 DT_SIZE_K(64)>;
+		};
+	};
+};
+
+&trng {
+	status = "okay";
+};

boards/adi/max32657evkit/max32657evkit_max32657.yaml

@@ -0,0 +1,14 @@
+identifier: max32657evkit/max32657
+name: max32657evkit-max32657
+vendor: adi
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - serial
+  - gpio
+  - trng
+ram: 256
+flash: 960

boards/adi/max32657evkit/max32657evkit_max32657_common.dtsi

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2024-2025 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <adi/max32/max32657-pinctrl.dtsi>
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "Analog Devices MAX32657EVKIT";
+	compatible = "adi,max32657evkit";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led1: led_1 {
+			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+			label = "Green LED";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+
+		pb1: pb1 {
+			gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "SW2";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+	};
+
+	/* These aliases are provided for compatibility with samples */
+	aliases {
+		led0 = &led1;
+		sw0 = &pb1;
+	};
+};
+
+&uart0 {
+	pinctrl-0 = <&uart0_tx_p0_9 &uart0_rx_p0_5>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	data-bits = <8>;
+	parity = "none";
+	status = "okay";
+};
+
+&clk_ipo {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};

boards/adi/max32657evkit/max32657evkit_max32657_defconfig

@@ -0,0 +1,16 @@
+# Copyright (c) 2024-2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable UART
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# It is secure fw, enable flags
+CONFIG_TRUSTED_EXECUTION_SECURE=y

boards/common/openocd-adi-max32.boards.cmake

@@ -14,13 +14,15 @@ endif()
 # MAX32666 share the same target configuration file with MAX32665
 if(CONFIG_SOC_MAX32666)
   set(MAX32_TARGET_CFG "max32665.cfg")
+elseif(CONFIG_SOC_MAX32657)
+  set(MAX32_INTERFACE_CFG "jlink.cfg")
 endif()
 
 board_runner_args(openocd --cmd-pre-init "source [find interface/${MAX32_INTERFACE_CFG}]")
 board_runner_args(openocd --cmd-pre-init "source [find target/${MAX32_TARGET_CFG}]")
 board_runner_args(openocd "--target-handle=_CHIPNAME.cpu")
 
-if(CONFIG_SOC_FAMILY_MAX32_M4)
+if(CONFIG_SOC_FAMILY_MAX32_M4 OR CONFIG_SOC_FAMILY_MAX32_M33)
   board_runner_args(openocd --cmd-pre-init "allow_low_pwr_dbg")
   board_runner_args(openocd "--cmd-erase=max32xxx mass_erase 0")
 endif()

dts/arm/adi/max32/max32657-pinctrl.dtsi

@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2024-2025 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
+
+&pinctrl {
+	/omit-if-no-ref/ i3c_scl_p0_0: i3c_scl_p0_0 {
+		pinmux = <MAX32_PINMUX(0, 0, AF1)>;
+	};
+
+	/omit-if-no-ref/ i3c_sda_p0_1: i3c_sda_p0_1 {
+		pinmux = <MAX32_PINMUX(0, 1, AF1)>;
+	};
+
+	/omit-if-no-ref/ spi0_mosi_p0_2: spi0_mosi_p0_2 {
+		pinmux = <MAX32_PINMUX(0, 2, AF1)>;
+	};
+
+	/omit-if-no-ref/ spi0_ss0_p0_3: spi0_ss0_p0_3 {
+		pinmux = <MAX32_PINMUX(0, 3, AF1)>;
+	};
+
+	/omit-if-no-ref/ spi0_miso_p0_4: spi0_miso_p0_4 {
+		pinmux = <MAX32_PINMUX(0, 4, AF1)>;
+	};
+
+	/omit-if-no-ref/ uart0_rx_p0_5: uart0_rx_p0_5 {
+		pinmux = <MAX32_PINMUX(0, 5, AF1)>;
+	};
+
+	/omit-if-no-ref/ spi0_sck_p0_6: spi0_sck_p0_6 {
+		pinmux = <MAX32_PINMUX(0, 6, AF1)>;
+	};
+
+	/omit-if-no-ref/ spi0_ss1_p0_7: spi0_ss1_p0_7 {
+		pinmux = <MAX32_PINMUX(0, 7, AF1)>;
+	};
+
+	/omit-if-no-ref/ spi0_ss2_p0_8: spi0_ss2_p0_8 {
+		pinmux = <MAX32_PINMUX(0, 8, AF1)>;
+	};
+
+	/omit-if-no-ref/ uart0_tx_p0_9: uart0_tx_p0_9 {
+		pinmux = <MAX32_PINMUX(0, 9, AF1)>;
+	};
+
+	/omit-if-no-ref/ sqwout_p0_13: sqwout_p0_13 {
+		pinmux = <MAX32_PINMUX(0, 13, AF1)>;
+	};
+
+	/omit-if-no-ref/ tmr0a_p0_0: tmr0a_p0_0 {
+		pinmux = <MAX32_PINMUX(0, 0, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr1a_p0_1: tmr1a_p0_1 {
+		pinmux = <MAX32_PINMUX(0, 1, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr3a_p0_2: tmr3a_p0_2 {
+		pinmux = <MAX32_PINMUX(0, 2, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr4a_p0_3: tmr4a_p0_3 {
+		pinmux = <MAX32_PINMUX(0, 3, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr5a_p0_4: tmr5a_p0_4 {
+		pinmux = <MAX32_PINMUX(0, 4, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr0b_p0_5: tmr0b_p0_5 {
+		pinmux = <MAX32_PINMUX(0, 5, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr4b_p0_6: tmr4b_p0_6 {
+		pinmux = <MAX32_PINMUX(0, 6, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr3b_p0_7: tmr3b_p0_7 {
+		pinmux = <MAX32_PINMUX(0, 7, AF2)>;
+	};
+
+	/omit-if-no-ref/ i3c_pur_p0_8: i3c_pur_p0_8 {
+		pinmux = <MAX32_PINMUX(0, 8, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr1b_p0_9: tmr1b_p0_9 {
+		pinmux = <MAX32_PINMUX(0, 9, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr2a_p0_10: tmr2a_p0_10 {
+		pinmux = <MAX32_PINMUX(0, 10, AF2)>;
+	};
+
+	/omit-if-no-ref/ tmr5b_p0_11: tmr5b_p0_11 {
+		pinmux = <MAX32_PINMUX(0, 11, AF2)>;
+	};
+};

dts/arm/adi/max32/max32657.dtsi

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2024-2025 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <arm/armv8-m.dtsi>
+#include <zephyr/dt-bindings/clock/adi_max32_clock.h>
+
+/ {
+	soc {
+		sram: sram@30000000 {
+			ranges = <0x0 0x30000000 0x40000>;
+		};
+
+		peripheral: peripheral@50000000 {
+			ranges = <0x0 0x50000000 0x10000000>;
+
+			pinctrl: pin-controller@8000 {
+				ranges = <0x8000 0x50008000 0x1000>;
+			};
+
+			flc0: flash_controller@29000 {
+				compatible = "adi,max32-flash-controller";
+				reg = <0x29000 0x400>;
+
+				#address-cells = <1>;
+				#size-cells = <1>;
+				status = "okay";
+
+				flash0: flash@1000000 {
+					compatible = "soc-nv-flash";
+					reg = <0x01000000 DT_SIZE_K(1024)>;
+					write-block-size = <16>;
+					erase-block-size = <8192>;
+				};
+			};
+		};
+	};
+};
+
+#include "max32657_common.dtsi"